1. Field of the Invention
The invention relates to a switched-current memory circuit.
2. Description of Related Art
FIG. 1 shows two known switched-current memory circuits or cells, the grounded-gate memory and the zero-voltage switching memory.
The grounded-gate memory shown in FIG. 1a has been disclosed in a paper entitled "Switched-Current Signal Processing for Video Frequencies and Beyond" by J B Hughes and K W Moulding and published in IEEE Journal of Solid-State Circuits, Vol 28, No 3, March 1993, pp 314-322 and uses a non-inverting voltage amplifier G to reduce non-ideal behaviour resulting from finite memory transistor g.sub.m /g.sub.o. However, the charge injection from switch S3 is unchanged and becomes the dominant sampling error. It is signal-dependent and so causes harmonic distortion as well as offset and gain errors.
The zero-voltage switching memory shown in FIG. 1b has been disclosed in a paper entitled "Zero-Voltage Switching in Switched-Current Circuits" by D G Nairn published in the Digest of papers of IEEE International Symposium on Circuits and Systems, 1994, pp 289-292 and uses a virtual-earth inverting amplifier A to reduce g.sub.m /g.sub.o errors. Further, as the memory switch is placed at the amplifier's virtual earth the charge injection from the switch S3 is dumped onto capacitor C.sub.m to produce a signal-independent sampling error. This is less troublesome because it is only an offset error. However, the cell consumes more power, generates more noise and the more complex loop gives higher order settling behaviour which limits the cell's effective bandwidth.